Workshop on Programming and Performance Visualization Tools (ProTools 22)
November 13, 2022 (Sunday) 01:30 pm - 5:00 pm Central Standard Time
Held in conjunction with SC22: The International Conference on High Performance Computing, Networking, Storage and Analysis, and supported by the Virtual Institute - High Productivity Supercomputing (VI-HPS).
Background
Understanding program behavior is critical to overcome the expected architectural and programming complexities, such as limited power budgets, heterogeneity, hierarchical memories, shrinking I/O bandwidths, and performance variability, that arise on modern HPC platforms. To do so, HPC software developers need intuitive support tools for debugging, performance measurement, analysis, and tuning of large-scale HPC applications. Moreover, data collected from these tools such as hardware counters, communication traces, and network traffic can be far too large and too complex to be analyzed in a straightforward manner. We need new automatic analysis and visualization approaches to help application developers intuitively understand the multiple, interdependent effects that algorithmic choices have on application correctness or performance. The ProTools workshop combines two prior SC workshops: the Workshop on Visual Performance Analytics (VPA) and the Workshop on Extreme-Scale Programming Tools (ESPT).
The Workshop on Programming and Performance Visualization Tools (ProTools) intends to bring together HPC application developers, tool developers, and researchers from the visualization, performance, and program analysis fields for an exchange of new approaches to assist developers in analyzing, understanding, and optimizing programs for extreme-scale platforms.
Workshop Topics
- Performance tools for scalable parallel platforms
- Debugging and correctness tools for parallel programming paradigms
- Scalable displays of performance data
- Case studies demonstrating the use of performance visualization in practice
- Program development tool chains (incl. IDEs) for parallel systems
- Methodologies for performance engineering
- Data models to enable scalable visualization
- Graph representation of unstructured performance data
- Tool technologies for extreme-scale challenges (e.g., scalability, resilience, power)
- Tool support for accelerated architectures and large-scale multi-cores
- Presentation of high-dimensional data
- Visual correlations between multiple data source
- Measurement and optimization tools for networks and I/O
- Tool infrastructures and environments
- Human-Computer Interfaces for exploring performance data
- Multi-scale representations of performance data for visual exploration
- Application developer experiences with programming and performance tools
Previous Workshops
The ProTools workshop combines two prior SC workshops: the Workshop on Visual Performance Analytics (VPA) and the Workshop on Extreme-Scale Programming Tools (ESPT).
- ProTools 21 (virtual)
- ProTools 20 (virtual)
- ProTools 19 (Denver, CO, USA)
- ESPT 18 (Dallas, TX, USA)
- VPA 18 (Dallas, TX, USA)
- ESPT 17 (Denver, CO, USA)
- VPA 17 (Denver, CO)
- ESPT 16 (Salt Lake City, UT, USA)
- VPA 16 (Salt Lake City, UT)
- ESPT 15 (Austin, TX, USA)
- VPA 15 (Austin, TX)
- ESPT 14 (New Orleans, LA, USA)
- VPA 14 (New Orleans, LA)
- ESPT 13 (Denver, CO, USA)
- ESPT 12 (Salt Lake City, UT, USA)
Papers
Call for Papers
We solicit papers that focus on performance, debugging, and correctness tools for parallel programming paradigms as well as techniques and case studies at the intersection of performance analysis and visualization.
Papers must be submitted in PDF format (readable by Adobe Acrobat Reader 5.0 and higher) and formatted for 8.5” x 11” (U.S. Letter). Submissions should be a minimum of 6 pages and a maximum of 10 pages in the IEEE Conference format. The 10-page limit includes figures, tables, and references.
All papers must be submitted through the Supercomputing 2022 Linklings site. Submitted papers will be peer-reviewed and accepted papers will be published by IEEE.
Dates
Important Dates
- Submission deadline:
August 19August 22, 2022 (Anywhere on Earth) - Notification of acceptance: September 9, 2022 (AoE)
- Camera-ready deadline: October 10, 2022 (AoE)
- Workshop: November 13, 2022
Program
Technical Program
The workshop will be held on Sunday, November 13 2022 1:30-5:00pm CST.
Schedule
-
1:30 - 1:40
Welcome and Overview
-
1:40 - 2:30
Invited Talk: Analyze your multi-experiment, multi-architecture, and multi-tool performance data with Thicket
Olga Pearce, LLNL
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2:30 - 3:00
Conquering Noise with Hardware Counters on HPC Systems.
Marcus Ritter, Ahmad Tarraf, Alexander Geiß, Nour Daoud, Bernd Mohr, Felix Wolf.
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3:00 - 3:30
Afternoon Break
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3:30 - 4:00
Generating and Analyzing Program Call Graphs using Ontology.
Yonghong Yan, Chunhua Liao, Ethan Dorta.
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4:00 - 4:30
Performance Debugging and Tuning of Flash-X with Data Analysis Tools.
Kevin Huck, Xingfu Wu, Anshu Dubey, Antigoni Georgiadou, Austin Harris, Tom Klosterman, Matthew Trappett, Klaus Weide
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4:30 - 5:00
Performance analysis of the CFD solver CODA - Harnessing synergies between application and performance tools developers.
Ronny Tschueter, Immo Huismann, Bert Wesarg, Maximilian Knespel
Invited Talk
Please join our invited talk by Olga Pearce, Lawrence Livermore National Laboratory:
Analyze your multi-experiment, multi-architecture, and multi-tool performance data with Thicket
Born of necessity while developing complex multi-physics HPC simulations at Lawrence Livermore National Laboratory, Thicket is the user-facing tool in a suite of performance analysis tools. HPC users run codes on many architectures — different CPUs, different GPUs, and we expect more architecture heterogeneity in the future — and collect metadata using Adiak as well as performance data using LLNL’s Caliper and other measurement tools. Our users needed a programmatic way to analyze the data from these experiments. In this talk, we describe Thicket, the multi-dimensional performance data analysis tool, and showcase examples and use cases. We also describe the multi-year process of getting the buy-in of million-line code developers to integrate our performance analysis tool suite, and the leaps in performance engineering that were made as a result.
Committees
Workshop Chairs
David Boehme, Lawrence Livermore National Laboratory, USA
Anthony Danalis, University of Tennessee, Knoxville, USA
Kate Isaacs, University of Arizona, Tucson, USA
Program Committee
Brian Wylie, Juelich Supercomputing Centre
Gerhard Wellein, FAU Erlangen-Nuernberg
Jean-Baptiste Besnard, Paratools
Jonathan Madsen, AMD
Kevin Huck, University of Oregon
Martin Schulz, TU Munich
Michael Gerndt, TU Munich
Nathan Tallent, PNNL
Paul Rosen, University of South Florida
Stephanie Brink, LLNL
Tanzima Islam, Texas State University
Takanori Fujiwara, Linköping University